The doi above is for this specific version of this dataset, which is currently the latest. Newer versions may be published in the future. For a link that will always point to the latest version, please use
doi: 10.4121/ddd8cc44-4d7f-4afd-a11c-207e174ddf95

Singh, Abhairaj (2024): Data and code underlying the research of: Reference in array logic. Version 1. 4TU.ResearchData. dataset. https://doi.org/10.4121/ddd8cc44-4d7f-4afd-a11c-207e174ddf95.v1

Dataset

• Electrical and Electronic Engineering
• Engineering

computation in memory, logic, sense amplifier

CC0

RefWorks, BibTeX, Reference Manager, Endnote, DataCite, NLM, DC, CFF

by Abhairaj Singh

This focuses on maximizing the throughput and energy efficiency while performing multi-operand (N)OR and (N)AND operations. This paper proposes a referencing-in-array scheme with a differential voltage-based sensing technique that enables accurate two and multi-operand logic operations for RRAM-based CIM architecture. The scheme makes use of a 2T2R cell configuration to create a complementary bitcell structure that inherently acts also as a reference during the operation execution resulting in a high sensing margin. Moreover, the variation-sensitive multi-operand (N)AND operation is implemented using complementary-input (N)OR operation to further improve its accuracy. This dataset includes schematic netlist files, raw data on the Excel sheets for latency and power estimations/simulation results, and Matlab codes for generating the graphs and figures in the associated publication.

• 2024-02-16 first online, published, posted

4TU.ResearchData

g-zipped shape files, pdfs, xlsx, mat

Referencing-in-Array Scheme for RRAM-based CIM Architecture

• https://onlinelibrary.wiley.com/doi/full/10.1002/aisy.202000141
• https://www.nature.com/articles/s41565-020-0655-z

• MNEMOSENE (grant code 780215) EC Horizon 2020 Research and Innovation

TU Delft, Faculty of Electrical Engineering, Mathematics and Computer Science (EEMCS), Department of Computer Engineering