PV2 Islagenerates a state graph or a test case from an architecture spec

Tool to evaluate relaxed-memory behaviour of instruction set architectures w.r.t. arbitrary axiomatic memory models

Application domain/field

Expected input

Format:

Comments

License: BSD 2-Clause
Binary level Concurrency

Links

Last commit date

14 December 2021

Related papers

https://doi.org/10.1007/978-3-030-81685-8_14 (CAV '21)

Last publication date

15 July 2021

ProVerB specific

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ProVerB is a part of SLEBoK. Last updated: July 2022.