%0 Generic
%A Singh, Abhairaj
%D 2024
%T Data and code underlying the research of: Reference in array logic
%U 
%R 10.4121/ddd8cc44-4d7f-4afd-a11c-207e174ddf95.v1
%K computation in memory
%K logic
%K sense amplifier
%X <p>This focuses on maximizing the throughput and energy efficiency while performing multi-operand (N)OR and (N)AND operations. This paper proposes a referencing-in-array scheme with a differential voltage-based sensing technique that enables accurate two and multi-operand logic operations for RRAM-based CIM architecture. The scheme makes use of a 2T2R cell configuration to create a complementary bitcell structure that inherently acts also as a reference during the operation execution resulting in a high sensing margin. Moreover, the variation-sensitive multi-operand (N)AND operation is implemented using complementary-input (N)OR operation to further improve its accuracy.&nbsp;This dataset includes schematic netlist files, raw data on the Excel sheets for latency and power estimations/simulation results, and Matlab codes for generating the graphs and figures in the associated publication.</p>
%I 4TU.ResearchData